In conventional memory devices, an error correction code (ECC) decoder assumes that no transmission errors occur during transmission of a bit stream arriving at the ECC decoder from a memory during a read operation. However, as technology progresses, a data transmission channel extending from the memory to the ECC decoder can become faster, smaller, and/or longer, thereby increasing a potential for data errors during transmission of a bit stream of read data over the data transmission channel. If an error is introduced during transmission of the bit stream of read data from the memory to the ECC decoder, the ECC decoder may inadvertently generate an incorrect final read data output, which can cause operational failure on a host computer system. It is within this context that the present invention arises.